ARMY TM 5-6675-308-34
MARINE CORPS TM 08837A-34/2
O to + 5.5V lamp power.
reads the keyboard word, the parity status flip-flops are
reset. A long loop serial bus self-test function is pro-
+ 24V 20% at 120 ma maximum, fault indicator
vided in the CDU by wrapping around bits 8 through
power.
15 of the address word as bits 8 thru 15 of the keyboard
115 VAC l0%, 400 Hz 5% at 60 ma maximum,
word. There is no restriction on the bit patterns used on
panel lighting.
these bits.
(b) The second type of CDU word provides an
additional self-test feature for the CDU. This allows the
computer to read the contents of any of the eight
display registers without destroying the contents of the
consists of three major functional sections; the central
register or affecting the appearance of the display. To
processing unit (CPU) and memory, input/output (I/0)
read a register, the same sequence as reading the key-
section, and computer power supply. The computer is
board word is followed except that the self-test bit 4 is
functionally illustrated in figure FO-2. The CPU and
(on) and the subaddress code bits 5 thru 7 must be used
memory are the computational and storage element of
to identify the display register contents desired by the
the computer. The 1/0 section provides interface be-
computer.
tween the CPU and memory unit, IMU, and CDU. A
16-bit bidirectional data bus provides a common path
b. Display Logic Registers and Drivers. Eight 16-
for transferring instructions and operands from memory
bit data registers are movided for the storage of display
to the CPU for processing. It also provides for transfer-
data. Each of these registers can be loaded or read by
ring addresses and data generated by the CPU to the
the computer as described in paragraph a. Data con-
memory. The bidirectional data bus also provides a
tained in these registers control the various front panel
path for bidirectional data between the CPU and mem-
displays, electroluminescent lighting control relay, and
ory and the 1/0 section. A power supply, the third
audible alarm. Lamp drivers and keep-warm resistors
major section, provides regulated power for the com-
are employed to minimize lamp current surges.
puter. The following paragraphs describe each func-
tional section of the computer.
ploys a keyboard consisting of a row-column switch
a. Central Processing Unit. The CPU consists of
matrix. Scanning logic sequentially examines the status
two sections; the data section and the control section.
of each key and stops scanning when a key is pressed.
The resultant key code (which corresponds to the
(1) Data section. The data section comprises the
scanned address) is inserted into the keyboard word
arithmetic unit and its associated data registers. Both
transmitted from the CDU as described in paragraph a.
addresses and data are generated in the data section.
Since there is no register within the CDU to hold the
The data section is contained on the 16-bit data circuit
key code, the keyboard word must be requested by the
card assembly and consists of the following major
computer often enough to preclude the possibility of
elements:
missed keyboard actuations.
Accumulator
d. Discrete Logic. The CDU receives and transmits
Random access memory (RAM)
the following discrete signals.
Memory register
(1) Received discrete signals.
Adder unit
(a) Power reset, sets internal logic to initial
state.
A-switch
(b) Bit flag set, sets CDU bit flag.
B-switch
(c) Bit flag reset, resets CDU bit flag.
Output switch
(d) Malfunction; computer, battery, charging,
Holding register
and IMU malfunction discrete signals light respective
indicators,
(a) Accumulator. The 16-bit accumulator is the
(2) Transmitted discrete signals,
main arithmetic register in the CPU. The results of
most arithmetic operations are held in the accumulator,
(a) ON/OFF controls power to the PADS.
including any residual remainder after a divide opera-
(b) ENTER enables a power off sequence to the
tion.
PADS.
(b) Random access memory. The RAM consists
(c) CDU Power Requirements. The following
of sixteen 16-bit registers. Since each RAM register has
CDU power is received via the computer,
a unique address, the contents of any register can be
accessed.
+ 5V 2% logic power,
2-3
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