TM 5-1260-206-34
(6) Control (G) Card - T h e control (G) card provides the following:
Z Calculator
to
teletype
data
transfer
Z Multiplexer
select
control
logic
Z Shaft-angle
encoder
divide-by-four
logic
The circled numbers are keyed to F0-6.
C a l c u l a t o r / T T y Interface Control Circuitry - The Calculator/TTY interface
c i r c u i t allows the parallel transmission of X, Y, and AX data from the
C a l c u l a t o r to a serial TTY circuit. The ASCII data lines from the Calcu-
lator are applied to a 256-word by 8-bit PROM that converts the 8-level
A S C I I to a 5-level teletype code. T h e parallel-to-serial converter is a
Universal Asynchronous Receiver/Transmitter (UART) that converts the 5-bit
t e l e t y p e characters from parallel data to serial data. T h e output driver
p r o v i d e s the 20-milliampere loop current required by the TTY circuit.
Data transmission is initiated when a strobe (STROBE X-Y or STROBE SAE)
i s applied through the multiplexer storage (F) card to the Calculator.
The Calculator generates a high PCTL signal which is applied to the I / 0
c o n t r o l in the DAC/Calculator interface control circuit
. The
resulting FLG IN signal, applied through a one-shot on the F card results
in a low FLAG DELAY OUT (PFLG). The Calculator senses this signal and
t r a n s f e r s a 5-bit data element. A f t e r transmission of the data element,
PFLG goes high signaling the Calculator to send the next data element.
I f the Calculator has additional data to transmit, the I/0 c o n t r o l w i l l
e n a b l e the converter to start again. PRESET goes low when
is
p r e s s e d to reset the interface circuits.
D A C / C a l c u l a t o r Interface Control Circuitry - The DAC/Calculator interface
control circuit allows transmission of the X, Y,
m u l t i p l e x e r storage (F) card to the Calculator. T h e 1/0 control directs
the transfer of data from the Calculator to the TTY (1/0 low) or from the
DAC to the Calculator (I/0 h i g h ) . T h e receive function detector is
activated when any of the DIC pushbutton switches are pressed. When the
p u s h b u t t o n switch is released, the audio alarm logic generates a high
SAMPLE IND to sound the sonalert on the DIC. D a t a transmission is initia-
ted when a strobe (STROBE X-Y or STROBE SAE) is applied to the Calculator,
a s described for the Calculator/TTY interface control circuitry. The
resulting low PFLG indicates to the Calculator that a data element is
r e a d y for transmittal. When the Calculator has received the 8-bit data
element, PCTL goes low. T h i s sequence is repeated until all data is
t r a n s f e r r e d to the Calculator. T h e reset logic on the multiplexer stor-
age (F) card produces a RESET signal when the data transfer is complete.
T h i s signal is applied to the interface logic to terminate the transfer
a n d release control of the Calculator.
S h a f t Angle Encoder Divide-by-Four Circuitry - The shaft-angle encoder
dividers convert the 2000 pulses/revolution SAE CW and SAE CCW input
signals to 500 pulses/revolution CW and CCW output signals applied to
t h e multiplexer storage (F) card.
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